I am an experienced FPGA engineer skilled in the complete design process from design entry using VHDL, Verilog, SystemVerilog with tools like Xilinx Vivado and Intel Quartus to validation using simulators such as Questa, ModelSim, Vivado simulator. At Intel's Programmable Solutions Group (PSG), I was part of a training team where we developed courses and labs to quickly upskill other FPGA engineers in all things related to Intel FPGAs and Quartus Prime software.